Chapter 8: Testing and Verification — Digital System Design (CSC427) Notes

Combinational and sequential test generation, fault modeling (Stuck-At-0 / Stuck-At-1), and Design for Testability (DFT).

Elective Course
Ch. 8: Testing and Verification

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Ch. 7: Field Programmable Gate Arrays (FPGA) & VHDL

Topics & Key Objectives in Chapter 8

Combinational and sequential test generationfault modeling (Stuck-At-0 / Stuck-At-1)and Design for Testability (DFT).

Related Study Resources for Digital System Design (CSC427)

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