Digital Logic Past Questions

B.Sc. CSIT - First Semester

Tribhuvan University

Institute of Science and Technology

TU Exam Year: 2078

Bachelor Level: B.Sc. CSIT

Semester: First

Subject: Digital Logic (CSC116)

Full Marks: 60 | Pass Marks: 24

Time: 3 Hours

Candidates are required to give their answers in their own words as far as practicable.

SECTION A

Attempt all questions.

  1. 1.

    Design the sequential circuit with respect to the following state diagram using J-K Flip flops.
    State Diagram

  2. 2.

    Implement F = Σ(0,2,3,4,7) using:
    a. Multiplexer
    b. Decoder
    c. PLA

  3. 3.

    Differentiate between synchronous and asynchronous counter. Design mod-7 synchronous counter using T-flip flop. Show necessary truth tables and k-maps.

  4. 4.

    Provide one example where shift right operation can be used. Explain parallel-in-parallel-out register.

  5. 5.

    Carry out the following tasks:
    a. Perform 1's complement subtraction of 110101 - 100101
    b. Represent decimal number 0.125 into its binary form

  6. 6.

    Derive the Boolean expression for sum and carry of half adder. Draw its combinational circuit. Implement it using only NAND gates.

  7. 7.

    Express the Boolean function f = x + yz as a product of max-terms.

  8. 8.

    Minimize the following Boolean function using K-map:
    F(A,B,C,D) = Σm(0,1,3,5,7,8,9,11,13,15)

  9. 9.

    What are the practical implications of up counter? Explain Binary ripple counter.

  10. 10.

    Design a combinational circuit with three inputs and one output. The output is 1 when the binary value of the inputs is an odd number.

  11. 11.

    Differentiate between PLA and PAL. Explain 4-bit magnitude comparator.

  12. 12.

    Write short notes on (Any Two):
    a. Negative Logic
    b. CMOS
    c. EBCDIC